Cocotb

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Line 12: Line 12:
* Makefile for GHDL
* Makefile for GHDL
  # Makefile for GHDL
  # Makefile for GHDL
 +
  # defaults
  # defaults
  SIM ?= ghdl
  SIM ?= ghdl
  TOPLEVEL_LANG ?= vhdl
  TOPLEVEL_LANG ?= vhdl
 +
  # VHDL 2008
  # VHDL 2008
  EXTRA_ARGS +=--std=08
  EXTRA_ARGS +=--std=08
 +
  # TOPLEVEL is the name of the toplevel module in your VHDL file
  # TOPLEVEL is the name of the toplevel module in your VHDL file
-
  TOPLEVEL = first
+
  TOPLEVEL = my_toplevel
-
  VHDL_SOURCES += $(PWD)/../lab1/$(TOPLEVEL).vhd
+
   
-
  #VHDL_SOURCES += $(PWD)/../../hdl/*.vhdl
+
  # VHDL SOURCES is where your VHDL files are
 +
VHDL_SOURCES += $(PWD)/../../hdl/*.vhdl
 +
 +
# Wave creates a gtk-waveform (with all signals in toplevel)
  SIM_ARGS +=--wave=$(TOPLEVEL).ghw
  SIM_ARGS +=--wave=$(TOPLEVEL).ghw
 +
  # MODULE is the basename of the Python test file
  # MODULE is the basename of the Python test file
  MODULE = tb_$(TOPLEVEL)
  MODULE = tb_$(TOPLEVEL)
 +
  # include cocotb's make rules to take care of the simulator setup
  # include cocotb's make rules to take care of the simulator setup
  include $(shell cocotb-config --makefiles)/Makefile.sim
  include $(shell cocotb-config --makefiles)/Makefile.sim
 +
  # removing generated binary of top entity and .o-file on make clean
  # removing generated binary of top entity and .o-file on make clean
  clean::
  clean::
Line 35: Line 44:
*** Hvis den finnes fra før kan det gi problemer
*** Hvis den finnes fra før kan det gi problemer
*** /sim_build/ kan trygt slettes
*** /sim_build/ kan trygt slettes
 +
** MERK II: Husk modelsim.ini må være satt opp med VHDL2008 osv.
 +
** Starter man gui'et, så må man kjøre runsim.do fra sim_build i consolet
 +
** Og run-all hvis den er satt opp riktig. Det kan være lurt å legge til ting i .do fila.
  # Makefile
  # Makefile
   
   
  # defaults
  # defaults
-
#SIM ?= ghdl
 
  SIM ?= questa
  SIM ?= questa
  TOPLEVEL_LANG ?= vhdl   
  TOPLEVEL_LANG ?= vhdl   
Line 45: Line 56:
  GUI =1  
  GUI =1  
   
   
-
  # VHDL 2008
+
  # VHDL 2008 -- Must be set in modelsim.ini
-
#EXTRA_ARGS +=--std=08
+
   
   
  # TOPLEVEL is the name of the toplevel module in your VHDL file
  # TOPLEVEL is the name of the toplevel module in your VHDL file
-
  TOPLEVEL ?= qcount
+
  TOPLEVEL ?= my_toplevel
   
   
  #VHDL_SOURCES += $(PWD)/../src/$(TOPLEVEL).vhd*
  #VHDL_SOURCES += $(PWD)/../src/$(TOPLEVEL).vhd*
Line 55: Line 65:
   
   
  # SIM_ARGS is Simulation arguments. --wave determines name and type of waveform   
  # SIM_ARGS is Simulation arguments. --wave determines name and type of waveform   
-
  #SIM_ARGS+=--vcd=$(TOPLEVEL).vcd
+
# This may not work, but it is possible to set up...
 +
  # SIM_ARGS+=--vcd=$(TOPLEVEL).vcd
   
   
  # legges til i sim_build/ runsim.do --   
  # legges til i sim_build/ runsim.do --   
Line 68: Line 79:
   
   
  # MODULE is the basename of the Python test file
  # MODULE is the basename of the Python test file
-
  MODULE ?= tb_min
+
  MODULE ?= tb_(TOPLEVEL).py
   
   
  # include cocotb's make rules to take care of the simulator setup
  # include cocotb's make rules to take care of the simulator setup

Revision as of 10:37, 6 December 2023

Contents

For å kjøre Cocotb (etter installasjon - )

Om cocotb

Cocotb sørger for at vi linker simulator (her: GHDL eller Questa) med python. Under simulering kjøres vekselvis simulator eller python fil- de kjører ikke samtidig. De triggerne (await..) vi bruker i python testbenken bestemmer når simulatoren overlater roret til python koden. Etter simuleringen er ferdig så ramser cocotb opp kjøreresultatet.

Kjøre cocotb

  • I folderen med makefile, kjør 
make

Makefile

Makefila sørger for kompilering og kjøring av Cocotb, samt evt kjøring av GUI eller lagring av waveform fil

  • tb_<modulnavn>.py må inneholde python-testbenken
  • Makefile for GHDL 
# Makefile for GHDL

# defaults
SIM ?= ghdl
TOPLEVEL_LANG ?= vhdl

# VHDL 2008
EXTRA_ARGS +=--std=08

# TOPLEVEL is the name of the toplevel module in your VHDL file
TOPLEVEL = my_toplevel

# VHDL SOURCES is where your VHDL files are
VHDL_SOURCES += $(PWD)/../../hdl/*.vhdl

# Wave creates a gtk-waveform (with all signals in toplevel)
SIM_ARGS +=--wave=$(TOPLEVEL).ghw

# MODULE is the basename of the Python test file
MODULE = tb_$(TOPLEVEL)

# include cocotb's make rules to take care of the simulator setup
include $(shell cocotb-config --makefiles)/Makefile.sim

# removing generated binary of top entity and .o-file on make clean
clean::
-@rm -f $(TOPLEVEL)
-@rm -f e~$(TOPLEVEL).o
  • Makefile for Questa
    • MERK: Dette oppretter folderen /sim_build/
      • Hvis den finnes fra før kan det gi problemer
      • /sim_build/ kan trygt slettes
    • MERK II: Husk modelsim.ini må være satt opp med VHDL2008 osv.
    • Starter man gui'et, så må man kjøre runsim.do fra sim_build i consolet
    • Og run-all hvis den er satt opp riktig. Det kan være lurt å legge til ting i .do fila. 
# Makefile

# defaults
SIM ?= questa
TOPLEVEL_LANG ?= vhdl   

#GUI  Starter modelsim GUI
GUI =1 

# VHDL 2008 -- Must be set in modelsim.ini

# TOPLEVEL is the name of the toplevel module in your VHDL file
TOPLEVEL ?= my_toplevel

#VHDL_SOURCES += $(PWD)/../src/$(TOPLEVEL).vhd*
VHDL_SOURCES += $(PWD)/../src/*.vhd*

# SIM_ARGS is Simulation arguments. --wave determines name and type of waveform  
# This may not work, but it is possible to set up...
# SIM_ARGS+=--vcd=$(TOPLEVEL).vcd

# legges til i sim_build/ runsim.do --  
# add log -r *
# vcd file wave.vcd 
# vcd add -r /*
# run -all
# quit -sim

# -g<GENERIC> is used to set generics defined in the toplevel entity
# SIM_ARGS +=-gWIDTH=4

# MODULE is the basename of the Python test file
MODULE ?= tb_(TOPLEVEL).py

# include cocotb's make rules to take care of the simulator setup
include $(shell cocotb-config --makefiles)/Makefile.sim

# removing generated binary of top entity and .o-file on make clean
clean::
	-@rm -f $(TOPLEVEL)
	-@rm -f e~$(TOPLEVEL).o

WSL

For å starte windows explorer under WSL (i katalogen du står i) 

explorer.exe .
# ikke glem punktumet
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