Best practice, design and code
From Robin
(Difference between revisions)
(Ny side: {{PAGENAME}} __NOTOC__ The rules noted here are guidelines that will help creating code that is easy to read and maintain = VHDL = == FSM==) |
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__NOTOC__ | __NOTOC__ | ||
| - | The rules noted here are guidelines that will help creating | + | The rules noted here are guidelines that will help creating designs that are easy to verify, read and maintain |
= VHDL = | = VHDL = | ||
| + | == Sequential logic == | ||
| + | * Separate registers from combinational logic | ||
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| + | |||
== FSM== | == FSM== | ||
Revision as of 09:43, 15 March 2023
The rules noted here are guidelines that will help creating designs that are easy to verify, read and maintain
VHDL
Sequential logic
- Separate registers from combinational logic
