FPGA tools
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== FPGA tools on Windows == | == FPGA tools on Windows == | ||
- | Vivado | + | Vivado 2015.2 is situated on //bifrost/project0/robin/CADlib/2015/vivado |
- | + | it can be accessed from any Windows machine, but it does need to have | |
+ | the LM_LICENSE_FILE environment variable set to 5370@lisens.ifi.uio.no | ||
- | + | Vivado, ISE and questa is currently situated on ifiserv-854.ifi.uio.no, and LISP (2428) | |
+ | Please notify the engineer in ROBIN if there are issues. | ||
== FPGA tools on Linux == | == FPGA tools on Linux == |
Revision as of 09:59, 27 August 2015
Contents |
FPGA tools on Windows
Vivado 2015.2 is situated on //bifrost/project0/robin/CADlib/2015/vivado it can be accessed from any Windows machine, but it does need to have the LM_LICENSE_FILE environment variable set to 5370@lisens.ifi.uio.no
Vivado, ISE and questa is currently situated on ifiserv-854.ifi.uio.no, and LISP (2428) Please notify the engineer in ROBIN if there are issues.
FPGA tools on Linux
0in Catapult_C FormalPro Modelsim Xilinx
Starting xterm with all tools available
First time initialization
>cd ~ >mkdir fpgatools >cd fpgatools/ >/hom/mes/src/FPGATools/init_fpgatools
Note that when starting using run, you get an xterm with .bash_fpgatools (invisible when using ls-l) as source. Since spring 2012, we have moved the license file to tollheimtu from pordoi. The .bash_fpgatools will need to be upgraded either manually or by doing the initialization over again.
Launch
>cd ~/fpgatools >run
Use the new xterm window that pops up to start the FPGA tool you like. Paths to all the major components should be ready in the new xterm.
To start Modelsim type vsim To start Xilinx (ISE) type ise To start PlanAhead type planAhead etc
temporary fix for using questa
in the .bash_fpgatools in the ~/fpgatools folder: comment the MODEL TECH line, and replace With a newer line, like this:
# MODEL_TECH=/ifi/bifrost/project0/nano/programs/modelsim/modeltech MODEL_TECH=/ifi/bifrost/project0/robin/programs/installed/questa_10_1/questasim
this will make sure that when you write vsim, questa is started rather than modelsim.
Digilent Adept
Digilent Adept to program the Atlys board can be obtained from the Digilent website.
Note that some Xilinx scripts require GNU BASH. Ubuntu (and possibly others) come with DASH. Disable DASH by reconfiguring it:
sudo dpkg-reconfigure dash
Note that the tools available on Windows, such as Xilinx ISE/PlanAhead and Modelsim are not supported by drift on Linux.
To enable autocompletion and history in XMD:
rlwrap xmd
License server
Licenses can be checked out from lisens.ifi.uio.no:
export LM_LICENSE_FILE=5370@lisens.ifi.uio.no
On Windows:
setx LM_LICENSE_FILE 5370@lisens.ifi.uio.no
Robin Peripheral Repository
The ROBIN EDK repository is located at:
\\bifrost.ifi.uio.no\project0\robin\CADlib\spartan3EDK2012
It contains BSP for the Spartan3 Starter Board.
Set "Project Peripheral Reposotory Search Path" in XPS to enable it.
Academic Xilinx FPGA tools
Python interface to Xilinx/EDK MHS: https://github.com/EPiCS/reconos/tree/master/tools
XDL Format description: http://www.mn.uio.no/ifi/english/research/projects/cosrecos/publications/paper/recosoc11beckhoff.pdf
Bitstream Intepretation Library (Virtex5): https://github.com/florianbenz/bil
DeBit: http://code.google.com/p/debit/
GoAhead: http://www.mn.uio.no/ifi/english/research/projects/cosrecos/goahead/
Creating Hard Macros (guide): http://wiki.eng.iastate.edu/reconfigurable-computing-wiki/index.php/Creating_Hard_Macros
TORC: http://torc-isi.sourceforge.net/
ReconOS: https://github.com/EPiCS/reconos